1. Technical Field
The present invention relates to a server system and method for controlling the same, and particularly to a server system and an operation timing control method for controlling the server system after being powered up.
2. Related Art
Currently, a serer typically comprises a very large scale integrated (VLSI) circuit. In some important VLSI circuits, a reset signal may adversely affect an operational timing of the server. Only when the VLSI circuits receive the reset signal, will the circuits be initialized and reset and the server work normally.
However, in the currently available circuit designs of the server, some logic devices generating the reset signal may have a glitch generated therein upon being powered up of the server. When the glitch is transmitted to the important VLSI circuit in the server, it might be taken as the reset signal by the VLSI circuit. At this time, the VLSI circuit is generally initialized since the server is being powered up, and the glitch might be taken the reset signal and thus reset the server, resulting in an affected operation of the server.
In view of the above, it may be known that there has long been an issue where a glitch might be generated by some logic elements and mistaken as a reset signal when the server is powered up. Therefore, there is quite a need to set forth an improvement means to settle this problem.